VHDL models of the basic dual-rail asynchronous RSFQ gates

VHDL models of the basic dual-rail asynchronous RSFQ gates

Authors

  • Valery Todorov University of Chemical Technology and Metallurgy, 8 Kl. Ohridski, 1756 Sofia, Bulgaria

DOI:

https://doi.org/10.59957/see.v7.i1.2022.2

Abstract

This paper presents a basic approach for applying Very High-Speed Integrated Circuits Hardware Description Language (VHDL) descriptions of dual-rail rapid single flux quantum circuits (RSFQ). Because RSFQ is naturally pulsed, dual-rail data encoding encourages event driven data processing at very high speeds. A method for suitable simulation models of the basic asynchronous RSFQ gates is described. The realization of VHDL models is performed in relation with the subsequent implementation for simulation and parameter optimization of complex logic cells.

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Published

2022-12-03
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